1. Field of the Invention
One or more aspects of the invention generally relate to data processing, and more particularly to using single port memories to simulate a multi-ported memory in a programmable graphics processor or general purpose processor.
2. Description of the Related Art
Current data processing includes systems and methods developed to execute program instructions, including instructions with two or more operands. The operands are stored in registers within the processor for efficient access during the execution of a program. Some program instructions, such as, multiply and multiply-accumulate specify two or more operands. Conventionally, a register file includes a multi-ported memory so that two or more locations, each location storing an operand, may be read in a single clock cycle. Therefore, all of the operands needed for at least one program instruction may be acquired and output to an execution unit in a single clock cycle.
Compared with a single ported memory, a multi-ported memory requires more die area and uses more power. However, unlike a multi-ported memory, only a single location may be read in each clock cycle. Therefore, two or more clock cycles are needed to acquire the operands needed to execute one program instruction, reducing performance compared with a multi-ported memory.
Accordingly, it would be desirable to provide the performance advantages of a multi-ported register file within a processor using less die area and power.